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LTC3547B Dual Monolithic 300mA Synchronous Step-Down Regulator FEATURES

DESCRIPTIO

High Efficiency (Up to 96%) Dual Step-Down Outputs 300mA Output Current per Channel at VIN = 3V 2.25MHz Constant-Frequency Operation 2.5V to 5.5V Input Voltage Range Low Dropout Operation: 100% Duty Cycle No Schottky Diodes Required Internally Compensated for All Ceramic Capacitors Independent Internal Soft-Start for Each Channel Available in Fixed Output Versions Current Mode Operation for Excellent Line and Load Transient Response 0.6V Reference Allows Low Output Voltages Short-Circuit Protected Ultralow Shutdown Current: IQ < 1A Low Profile (0.75mm) 8-Lead 3mm x 2mm DFN Package
The LTC(R)3547B is a dual, 2.25MHz, constant-frequency, synchronous step-down DC/DC converter in a tiny 3mm x 2mm DFN package. 100% duty cycle provides low dropout operation, extending battery life in portable systems. Low output voltages are supported with the 0.6V feedback reference voltage. Each regulator can supply 300mA continuous output current. The input voltage range is 2.5V to 5.5V, making it ideal for Li-Ion polymer and USB powered applications. Supply current is only 1A in shutdown. An internally set 2.25MHz switching frequency allows the use of tiny surface mount inductors and capacitors. Internal soft-start reduces inrush current during start-up. All outputs are internally compensated to work with ceramic capacitors. The LTC3547B is available in a low profile (0.75mm) 3mm x 2mm DFN package. The LTC3547B is also available in a fixed output voltage configuration selected via internal resistor dividers (see Table 2).
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6580258, 5481178, 6304066, 6127815, 6498466, 6611131.
APPLICATIO S

Cellular Telephones Digital Still Cameras Wireless and DSL Modems Portable Media Players PDAs/Palmtop PCs
TYPICAL APPLICATIO
VIN 2.5V TO 5.5V
Dual Monolithic Buck Regulator in 8-Lead 3mm x 2mm DFN
100 90 80
RUN2 VIN RUN1 VOUT2 1.8V AT 300mA 4.7H 10pF LTC3547B SW2 SW1 10pF 4.7H VOUT1 2.5V AT 300mA
EFFICIENCY (%)
4.7F
70 60 50 40 30 20 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 100 OUTPUT CURRENT (mA)
VFB2 4.7F 475k 237k
GND
VFB1 150k 475k 4.7F
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10 0
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Efficiency vs Output Current for VOUT = 2.5V
1 POWER LOSS (W) 0.1 0.01 0.001 1000
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LTC3547B ABSOLUTE
(Note 1)
AXI U RATI GS
VIN LTC3547BE .............................................. -0.3V to 6V LTC3547BI ............................................... -0.3V to 7V VFB1, VFB2 ......................................... -0.3V to VIN +0.3V RUN1, RUN2 ..................................... -0.3V to VIN +0.3V SW1, SW2 (DC) ................................ -0.3V to VIN +0.3V P-Channel Switch Source Current (DC)................500mA N-Channel Switch Sink Current (DC) ...................500mA Peak SW Sink and Source Current (Note 5) .........700mA Ambient Operating Temperature Range (Note 2) LTC3547BE .......................................... -40C to 85C LTC3547BI ......................................... -40C to 125C Maximum Junction Temperature........................... 125C Storage Temperature Range................... -65C to 125C
ORDER INFORMATION
LEAD FREE FINISH LTC3547BEDDB#PBF LTC3547BEDDB-1#PBF LTC3547BIDDB #PBF TAPE AND REEL LTC3547BEDDB#TRPBF LTC3547BIDDB #TRPBF PART MARKING* LCPD LCPD PACKAGE DESCRIPTION 8-Lead (3mm x 2mm) Plastic DFN 8-Lead (3mm x 2mm) Plastic DFN 8-Lead (3mm x 2mm) Plastic DFN TEMPERATURE RANGE -40C to 85C -40C to 85C -40C to 125C LTC3547BEDDB-1#TRPBF LCPF
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 3.6V, unless otherwise noted.
SYMBOL VIN VUV IFB VFBREG1 PARAMETER VIN Operating Voltage VIN Undervoltage Lockout Feedback Pin Input Current Regulated Feedback Voltage (VFB1) CONDITIONS LTC3547BE, LTC3547BE-1, LTC3547BI VIN Low to High LTC3547BE, VFB = VFBREG LTC3547BE-1, VFB = VFBREG LTC3547BE, 0C TA 85C LTC3547BE, -40C TA 85C LTC3547BI, -40C TA 125C LTC3547BE-1, 0C TA 85C LTC3547BE-1, -40C TA 85C LTC3547BE, 0C TA 85C LTC3547BE, -40C TA 85C LTC3547BI, -40C TA 125C LTC3547BE-1, 0C TA 85C LTC3547BE-1, -40C TA 85C

ELECTRICAL CHARACTERISTICS
VFBREG2
Regulated Feedback Voltage (VFB2)
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PIN CONFIGURATION
TOP VIEW VFB1 1 RUN1 2 VIN 3 SW1 4 9 8 VFB2 7 RUN2 6 SW2 5 GND
DDB PACKAGE 8-LEAD (3mm x 2mm) PLASTIC DFN TJMAX = 125C, JA = 76C/W EXPOSED PAD (PIN 9) IS GND MUST BE SOLDERED TO PCB
MIN 2.5 2.5
TYP
MAX 5.5 6.5
UNITS V V V nA A V V V V V V V V V V
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2.2 3 0.590 0.588 0.588 1.770 1.764 0.590 0.588 0.588 1.180 1.176 0.600 0.600 0.600 1.800 1.800 0.600 0.600 0.600 1.200 1.200
2.5 30 6 0.610 0.612 0.612 1.830 1.836 0.610 0.612 0.612 1.220 1.224
LTC3547B ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Reference Voltage Line Regulation Output Voltage Load Regulation Input DC Supply Current Active Mode (Note 4) Shutdown Oscillator Frequency Peak Switch Current Limit Channel 1 (300mA) Channel 2 (300mA) Channel 1 (Note 3) Top Switch On-Resistance Bottom Switch On-Resistance Channel 2 (Note 3) Top Switch On-Resistance Bottom Switch On-Resistance Switch Leakage Current Soft-Start Time RUN Threshold High RUN Leakage Current
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 3.6V, unless otherwise noted.
CONDITIONS VIN = 2.5V to 5.5V ILOAD = 50mA to 300mA VFB1 = VFB2 = 0.95 x VFBREG RUN1 = RUN2 = 0V, VIN = 5.5V VFB = 0.6V VIN = 2.5V, VFB < VFBREG , Duty Cycle < 35%
MIN
TYP 0.3 0.5 450 0.1
MAX 0.5
UNITS %/V %
VLINEREG VLOADREG
IS
700 1 2.7
A A MHz mA mA
fOSC ILIM
1.8 400 400
2.25 550 550 0.8 0.75 0.8 0.75 0.01
RDS(ON)
VIN = 3.6V, ISW = 100mA VIN = 3.6V, ISW = 100mA VIN = 3.6V, ISW = 100mA VIN = 3.6V, ISW = 100mA VIN = 5V, VRUN = 0V VFB From 10% to 90% Full-Scale

1.05 1.05 1.05 1.05 1 0.850 1.2 1
A ms V A
ISW(LKG) tSOFTSTART VRUN IRUN
0.450 0.4
0.650 1 0.01
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3547BE is guaranteed to meet specified performance from 0C to 85C. Specifications over the -40C and 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3547BI is guaranteed over the -40C to 125C operating temperature range. Note 3: The DFN switch on-resistance is guaranteed by correlation to wafer level measurements.
Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5: Guaranteed by long-term current density limitations. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
TYPICAL PERFOR A CE CHARACTERISTICS
Pulse Skip Mode Operation
100 SW, AC-COUPLED 5V/DIV EFFICIENCY (%) VOUT 50mV/DIV 90
SUPPLY CURRENT (A)
IL 50mA/DIV
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VIN = 3.6V VOUT = 1.8V ILOAD = 1mA
10s/DIV
UW
TA = 25C unless otherwise specified. Supply Current vs Temperature
400 350 ILOAD = 0A VIN = 5.5V
Efficiency vs Input Voltage
VOUT = 1.8V
80 70 60 50 40 30 20 10 2.5 3 3.5 4.5 4 VIN (V) 5 5.5
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300 250 200 150 100 -50 VIN = 2.7V
IOUT = 0.1mA IOUT = 1mA IOUT = 10mA IOUT = 100mA IOUT = 300mA
-25
50 25 0 TEMPERATURE (C)
75
100
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LTC3547B TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency vs Temperature
2.6 2.5 LEAKAGE CURRENT (nA) 2.4 FREQUENCY (MHz) 2.3 2.2 2.1 2.0 1.9 1.8 -50 -25 0 75 50 25 TEMPERATURE (C) 100 125 0 -50 -25 0 LEAKAGE CURRENT (pA) VIN = 4.2V VIN = 3.6V VIN = 2.7V 40 400 50
Reference Voltage vs Temperature
1.5 1.0 0.5 RDS(ON) () 0 -0.5 -1.0 -1.5 -50 1.0 0.9
VFB (% ERROR)
RDS(ON) ()
-25
50 25 TEMPERATURE (C)
0
Efficiency vs Load Current
100 90 80 EFFICIENCY (%) EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 100 OUTPUT CURRENT (mA) 1000
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VOUT = 1.2V
4
UW
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Switch Leakage vs Temperature
500
Switch Leakage vs Input Voltage
30
300 SYNCHRONOUS SWITCH 200
20
SYNCHRONOUS SWITCH MAIN SWITCH
10
100 MAIN SWITCH 100 125 0 2.5 3 3.5 4.5 4 VIN (V) 5 5.5 6
50 75 25 TEMPERATURE (C)
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RDS(ON) vs Input Voltage
1.3 MAIN SWITCH 1.2 1.1 0.8 0.7 0.6 0.5 0.5 75 100 0.4 2.5 3 3.5 4.5 4 VIN (V) 5 5.5 6 SYNCHRONOUS SWITCH 1.0 0.9 0.8 0.7 0.6
RDS(ON) vs Temperature
VIN = 2.7V
VIN = 3.6V
VIN = 4.2V 0
0.4 -50 -25
MAIN SWITCH SYNCHRONOUS SWITCH 100 125
75 50 25 TEMPERATURE (C)
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Efficiency vs Load Current
100 90 80 70 60 50 40 30 20 10 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 100 1 OUTPUT CURRENT (mA) 1000
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VOUT = 1.8V
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LTC3547B TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Load Current
100 90 80 VOUT ERROR (%) EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 100 1 OUTPUT CURRENT (mA) 1000
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VOUT = 2.5V
VOUT ERROR (%)
Start-Up From Shutdown
RUN 2V/DIV VOUT 1V/DIV
IL 100mA/DIV
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VIN = 3.6V VOUT = 1.8V ILOAD = 0A
200s/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 300mA
Load Step
VOUT, AC-COUPLED 100mV/DIV IL 200mA/DIV ILOAD 200mA/DIV
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VIN = 3.6V VOUT = 1.8V ILOAD = 20mA TO 300mA
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Load Regulation
1.2 1.O 0.8 0.6 0.4 0.2 0 -0.2 0 50 100 150 200 250 LOAD CURRENT (mA) 300 350 PULSE SKIP MODE OPERATION VIN = 3.6V VOUT = 1.2V VOUT = 1.8V VOUT = 2.5V 0.6 0.4 0.2 0 -0.2 -0.4
Line Regulation
VOUT = 1.8V ILOAD = 100mA
-0.6 2.5
3
3.5
4 VIN (V)
4.5
5
5.5
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Start-Up From Shutdown
VOUT, AC-COUPLED 100mV/DIV
Load Step
RUN 2V/DIV VOUT 1V/DIV
IL 200mA/DIV ILOAD 200mA/DIV
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IL 200mA/DIV 250s/DIV
10s/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 0mA TO 300mA
Load Step
VOUT, AC-COUPLED 100mV/DIV IL 200mA/DIV ILOAD 200mA/DIV
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10s/DIV
VIN = 3.6V VOUT = 1.8V ILOAD = 50mA TO 300mA
10s/DIV
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LTC3547B PI FU CTIO S
VFB1 (Pin 1): Regulator 1 Output Feedback. Receives the feedback voltage from the external resistor divider across the regulator 1 output. Nominal voltage for this pin is 0.6V. RUN1 (Pin 2): Regulator 1 Enable. Forcing this pin to VIN enables regulator 1, while forcing it to GND causes regulator 1 to shut down. VIN (Pin 3): Main Power Supply. Must be closely decoupled to GND. SW1 (Pin 4): Regulator 1 Switch Node Connection to the Inductor. This pin swings from VIN to GND. GND (Pin 5): Ground. Connect to the (-) terminal of COUT, and the (-) terminal of CIN. SW2 (Pin 6): Regulator 2 Switch Node Connection to the Inductor. This pin swings from VIN to GND. RUN2 (Pin 7): Regulator 2 Enable. Forcing this pin to VIN enables regulator 2, while forcing it to GND causes regulator 2 to shut down. VFB2 (Pin 8): Regulator 2 Output Feedback. Receives the feedback voltage from the external resistor divider across the regulator 2 output. Nominal voltage for this pin is 0.6V. Exposed Pad (Pin 9): Electrically Connected to GND. Must be soldered to the PCB for optimum thermal performance.
FUNCTIONAL DIAGRAM
REGULATOR 1 SLOPE COMP 3 VIN
VFB1
1
IRCMP SHUTDOWN
RUN1 RUN2
2 0.6V REF 7 OSC OSC
VFB2
8
REGULATOR 2 (IDENTICAL TO REGULATOR 1)
6
-
+
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-
EA 0.6V
-
ITH VSLEEP SLEEP
-
ICOMP
+
5
+
+
PULSE SKIP S RS LATCH Q
SOFT-START
R
Q SWITCHING LOGIC AND BLANKING CIRCUIT
ANTI SHOOTTHRU 4 SW1
5 GND
3547 FD
6 SW2
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LTC3547B OPERATIO
The LTC3547B uses a constant-frequency current mode architecture. The operating frequency is set at 2.25MHz. Both channels share the same clock and run in-phase. The output voltage is set by an external resistor divider returned to the VFB pins. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and regulates the peak inductor current accordingly. Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The current into the inductor and the load increases until the peak inductor current (controlled by ITH) is reached. The RS latch turns off the synchronous switch and energy stored in the inductor is discharged through the bottom switch (N-channel MOSFET) into the load until the next clock cycle begins, or until the inductor current begins to reverse (sensed by the IRCMP comparator). The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier regulates the VFB pin to the internal 0.6V reference by adjusting the peak inductor current accordingly. At very low load currents, the LTC3547B automatically transitions from constant frequency operation to discontinuous operation, where the regulator begins skipping pulses. Even though the total power loss decreases with load, the efficiency of the switching regulator will drop, because the power delivered to the output becomes very small. For applications where light load efficiency is a priority, consider using the LTC3547 instead.
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(Refer to Functional Diagram )
Dropout Operation When the input supply voltage decreases toward the output voltage the duty cycle increases to 100%, which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. An important design consideration is that the RDS(ON) of the P-channel switch increases with decreasing input supply voltage (see Typical Performance Characteristics). Therefore, the user should calculate the worst-case power dissipation when the LTC3547B is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information Section). Soft-Start In order to minimize the inrush current on the input bypass capacitor, the LTC3547B slowly ramps up the output voltage during start-up. Whenever the RUN1 or RUN2 pin is pulled high, the corresponding output will ramp from zero to full-scale over a time period of approximately 650s. This prevents the LTC3547B from having to quickly charge the output capacitor and thus supplying an excessive amount of instantaneous current. Short-Circuit Protection When either regulator output is shorted to ground, the corresponding internal N-channel switch is forced on for a longer time period for each cycle in order to allow the inductor to discharge, thus preventing current runaway. This technique has the effect of decreasing switching frequency. Once the short is removed, normal operation resumes and the regulator output will return to its nominal voltage.
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LTC3547B APPLICATIO S I FOR ATIO
A general LTC3547B application circuit is shown in Figure 1. External component selection is driven by the load requirement, and begins with the selection of the inductor L. Once the inductor is chosen, CIN and COUT can be selected. Inductor Selection Although the inductor does not influence the operating frequency, the inductor value has a direct effect on ripple current. The inductor ripple current IL decreases with higher inductance and increases with higher VIN or VOUT : IL = VOUT V * 1 OUT fO * L VIN (1)
Accepting larger values of IL allows the use of low inductances, but results in higher output voltage ripple, greater core losses, and lower output current capability. A reasonable starting point for setting ripple current is 40% of the maximum output load current. So, for a 300mA regulator, IL = 120mA (40% of 300mA).
VIN 2.5V TO 5.5V C1 RUN2 VIN RUN1 L2 VOUT2 CF2 LTC3547B SW2 SW1 L1 CF1 VOUT1
VFB2 COUT2 R4 R3
GND
VFB1 R1 R2 COUT1
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Figure 1. LTC3547B General Schematic
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Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements, and any radiated field/EMI requirements, than on what the LTC3547B requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3547B applications.
Table 1. Representative Surface Mount Inductors
MANUFACTURER Taiyo Yuden PART NUMBER CB2016T2R2M CB2012T2R2M CB2016T3R3M ELT5KT4R7M CDRH2D18/LD LQH32CN4R7M23 NR30102R2M NR30104R7M FDKMIPF2520D FDKMIPF2520D FDKMIPF2520D VLF3010AT4R7MR70 VLF3010AT3R3MR87 VLF3010AT2R2M1RD MAX DC VALUE CURRENT 2.2H 2.2H 3.3H 4.7H 4.7H 4.7H 2.2H 4.7H 4.7H 3.3H 2.2H 4.7H 3.3H 2.2H 510mA 530mA 410mA 950mA 630mA 450mA 1100mA 750mA 1100mA 1200mA 1300mA 700mA 870mA 1000mA DCR HEIGHT 0.13 1.6mm 0.33 1.25mm 0.27 1.6mm 0.2 0.086 0.2 0.1 0.19 0.11 0.1 0.08 0.24 0.17 0.12 1.2mm 2mm 2mm 1mm 1mm 1mm 1mm 1mm 1mm 1mm 1mm Panasonic Sumida Murata Taiyo Yuden FDK TDK
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LTC3547B APPLICATIO S I FOR ATIO
Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT/VIN. To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS IMAX VOUT (VIN - VOUT ) VIN (2)
Where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM - IL/2. This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer's ripple current ratings are often based on only 2000 hours lifetime. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the design. An additional 0.1F to 1F ceramic capacitor is also recommended on VIN for high frequency decoupling when not using an all-ceramic capacitor solution. Output Capacitor (COUT) Selection The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple VOUT is determined by: VOUT IL ESR + 1 8fCOUT (3)
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where f = operating frequency, COUT = output capacitance and IL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since IL increases with input voltage. If tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP Kemet T510 and , T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3547B control loop does not depend on the output capacitor's ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. For more information, see Application Note 88. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
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LTC3547B APPLICATIO S I FOR ATIO
Setting the Output Voltage The LTC3547B regulates the VFB1 and VFB2 pins to 0.6V during regulation. Thus, the output voltage is set by a resistive divider according to the following formula: VOUT = 0.6V 1+ R2 R1 (4)
Keeping the current small (< 5A) in these resistors maximizes efficiency, but making it too small may allow stray capacitance to cause noise problems or reduce the phase margin of the error amp loop. To improve the frequency response of the main control loop, a feedback capacitor (CF) may also be used. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. Fixed output versions of the LTC3547B (e.g. LTC3547B-1) include an internal resistive divider, eliminating the need for external resistors. The resistor divider is chosen such that the VFB input current is 3A. For these versions, the VFB pin should be connected directly to VOUT. Table 2 lists the fixed output voltages available for the LTC3547B.
Table 2. Fixed Output Voltage Versions
Part Number LTC3547B LTC3547B-1 VOUT1 Adjustable 1.8V VOUT2 Adjustable 1.2V
Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When
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a load step occurs, VOUT immediately shifts by an amount equal to ILOAD * ESR, where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second-order overshoot/DC ratio cannot be used to determine the phase margin. In addition, feedback capacitors (CF1 and CF2) can be added to improve the high frequency response, as shown in Figure 1. Capacitor CF provides phase lead by creating a high frequency zero with R2 which improves the phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching in loads with large (>1F) input capacitors. The discharged input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot SwapTM controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-starting.
Hot Swap is a trademark of Linear Technology Corporation.
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LTC3547B APPLICATIO S I FOR ATIO
Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc., are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four sources usually account for the losses in LTC3547B circuits: 1) VIN quiescent current, 2) switching losses, 3) I2R losses, 4) other system losses. 1) The VIN current is the DC supply current given in the Electrical Characteristics which excludes MOSFET driver and control currents. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. 2) The switching current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and
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bottom MOSFET switches. The gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 3) I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is "chopped" between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP) * (DC) + (RDS(ON)BOT) * (1- DC) (5) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2 * (RSW + RL) 4) Other "hidden" losses, such as copper trace and internal battery resistances, can account for additional efficiency degradations in portable systems. It is very important to include these "system" level losses in the design of a system. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses, including diode conduction losses during dead-time, and inductor core losses, generally account for less than 2% total additional loss.
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LTC3547B APPLICATIO S I FOR ATIO
Thermal Considerations In a majority of applications, the LTC3547B does not dissipate much heat due to its high efficiency. In the unlikely event that the junction temperature somehow reaches approximately 150C, both power switches will be turned off and the SW node will become high impedance. The goal of the following thermal analysis is to determine whether the power dissipated causes enough temperature rise to exceed the maximum junction temperature (125C) of the part. The temperature rise is given by: TRISE = PD * JA (6) Where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TRISE + TAMBIENT (7) As a worst-case example, consider the case when the LTC3547B is in dropout on both channels at an input voltage of 2.7V with a load current of 300mA and an ambient temperature of 70C. From the Typical Performance Characteristics graph of Switch Resistance, the RDS(ON) of the main switch is 0.9. Therefore, power dissipated by each channel is: PD = IOUT2 * RDS(ON) = 81mV Given that the thermal resistance of a properly soldered DFN package is approximately 76C/W, the junction temperature of an LTC3547B device operating in a 70C ambient temperature is approximately: TJ = (2 * 0.081W * 76C/W) + 70C = 82.3C which is well below the absolute maximum junction temperature of 125C.
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PC Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3547B. These items are also illustrated graphically in the layout diagrams of Figures 2 and 3. Check the following in your layout: 1. Does the capacitor CIN connect to the power VIN (Pin 3) and GND (Pin 5) as closely as possible? This capacitor provides the AC current of the internal power MOSFETs and their drivers. 2. Are the respective COUT and L closely connected? The (-) plate of COUT returns current to GND and the (-) plate of CIN. 3. The resistor divider, R1 and R2, must be connected between the (+) plate of COUT1 and a ground sense line terminated near GND (Pin 5). The feedback signals VFB1 and VFB2 should be routed away from noisy components and traces, such as the SW lines (Pins 4 and 6), and their trace length should be minimized. 4. Keep sensitive components away from the SW pins if possible. The input capacitor CIN and the resistors R1, R2, R3 and R4 should be routed away from the SW traces and the inductors. 5. A ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the GND pin at a single point. These ground traces should not share the high current path of CIN or COUT. 6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VIN or GND.
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LTC3547B APPLICATIO S I FOR ATIO
VIN 2.5V TO 5.5V C1 RUN2 VIN RUN1 L2 VOUT2 CF2 LTC3547B SW2 SW1 CF1 L1 VOUT1
COUT2
R4
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 2. LTC3547B Layout Diagram (See Board Layout Checklist)
VIA TO GND
R1 R2
VIA TO VOUT1 CF2 CF2 VIA TO VIN VIN SW1 L1 CIN SW2 L2
Figure 3. LTC3547B Suggested Layout
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VFB2 R3 GND VFB1 R1 R2 COUT1
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VFB1
VFB2
R3 R4
VIA TO GND
VIA TO VOUT2
GND COUT2 COUT1
VOUT2
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VOUT1
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LTC3547B APPLICATIO S I FOR ATIO
Design Example As a design example, consider using the LTC3547B in a portable application with a Li-Ion battery. The battery provides a VIN ranging from 2.8V to 4.2V. The load on each channel requires a maximum of 300mA in active mode and 2mA in standby mode. The output voltages are VOUT1 = 2.5V and VOUT2 = 1.8V. Start with channel 1. First, calculate the inductor value for about 40% ripple current (120mA in this example) at maximum VIN. Using a derivation of Equation 1: 2.5V 2.5V = 3.75H L1= *1 2.25MHz * (120mA) 4.2V For the inductor, use the closest standard value of 4.7H. A 4.7F capacitor should be more than sufficient for this output capacitor. As for the input capacitor, a typical value of CIN = 4.7F should suffice, as the source impedance of a Li-Ion battery is very low.
VIN 2.5V TO 5.5V
C1 4.7F L2 4.7H CF2, 10pF
VOUT2 1.8V AT 300mA
COUT2 4.7F
R4 562k
C1, C2, C3: TAIYO YUDEN JMK316BJ475ML
Figure 4a. Design Example Circuit
100 90 80 EFFICIENCY (%) EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 100 OUTPUT CURRENT (mA) 1000 VOUT = 1.8V 100 90 80 70 60 50 40 30 20 10 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 100 1 OUTPUT CURRENT (mA) 1000
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Figure 4b. Efficiency vs Output Current
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The feedback resistors program the output voltage. To maintain high efficiency at light loads, the current in these resistors should be kept small. Choosing 2A with the 0.6V feedback voltage makes R1~300k. A close standard 1% resistor is 280k, using Equation 4. R2 = VOUT 0.6 1 * R1= 887k An optional 10pF feedback capacitor (CF1) may be used to improve transient response. Using the same analysis for channel 2 (VOUT2 = 1.8V), the results are: L2 = 3.81H R3 = 280k R4 = 560k Figure 4 shows the complete schematic for this example, along with the efficiency curve and transient response.
RUN2 VIN RUN1 LTC3547B SW2 SW1 CF1, 10pF L1 4.7H VOUT1 2.5V AT 300mA VFB2 R3 280k GND VFB1 R1 280k R2 887k COUT1 4.7F
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L1, L2: MURATA LQH32CN4R7M33
VOUT = 2.5V
LTC3547B APPLICATIO S I FOR ATIO
VOUT, AC-COUPLED 100mV/DIV
IL 200mA/DIV ILOAD 200mA/DIV 10s/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 20mA TO 300mA
Figure 4c. Transient Response
PACKAGE DESCRIPTIO
DDB Package 8-Lead Plastic DFN (3mm x 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
0.61 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.20 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 BAR TOP MARK (SEE NOTE 6)
NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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VOUT, AC-COUPLED 100mV/DIV IL 200mA/DIV ILOAD 200mA/DIV
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10s/DIV VIN = 3.6V VOUT = 2.5V ILOAD = 20mA TO 300mA
3.00 0.10 (2 SIDES)
R = 0.05 TYP
R = 0.115 TYP 5
0.40 0.10 8
2.00 0.10 (2 SIDES) 0.56 0.05 (2 SIDES) 0.75 0.05
0.200 REF
4 0.25 0.05 2.15 0.05 (2 SIDES)
1 0.50 BSC
PIN 1 R = 0.20 OR 0.25 x 45 CHAMFER
(DDB8) DFN 0905 REV B
0 - 0.05
BOTTOM VIEW--EXPOSED PAD
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LTC3547B TYPICAL APPLICATIO
VIN 2.5V TO 5.5V C1 4.7F L2 4.7H CF2, 10pF
Dual 300mA Buck Converter with Pulse Skip Mode
RUN2 VIN RUN1 SW2 SW1
VOUT2 1.8V AT 300mA
LTC3547B VFB2 GND VFB1
COUT2 4.7F
R4 562k
R3 280k
C1, COUT1, COUT2: TAIYO YUDEN JMK316BJ475ML L1, L2: MURATA LQH32CN4R7M33
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ThinSOT is a trademark of Linear Technology Corporation
16 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007
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1.8V/1.2V Dual 300mA Buck Converter with Pulse Skip Mode
VIN 2.5V TO 5.5V L1 4.7H CF1, 10pF C1 4.7F VOUT1 2.5V AT 300mA VOUT2 1.2V AT 300mA L2 4.7H RUN2 VIN RUN1 SW2 SW1 L1 4.7H VOUT1 1.8V AT 300mA LTC3547B-1 R2 887k COUT1 4.7F
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R1 280k
COUT2 4.7F
VFB2
GND
VFB1
COUT1 4.7F
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C1, COUT1, COUT2: TAIYO YUDEN JMK316BJ475ML L1, L2: MURATA LQH32CN4R7M33
3547bfb LT 0807 REV B * PRINTED IN USA

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